Path:OKDatasheet > Dane Semiconductor > Data Delay Devices Datasheet > PDU54-100M
PDU54-100M spec: Delay 100 +/-50 ns, 4-BIT, ECL-interfaced programmable delay line
Podobne PDU54-100M
- PDU53-100
- Delay 100 +/-50 ns, 3-BIT, ECL-interfaced programmable delay line
- PDU53-1000
- Delay 1000 +/-200 ns, 3-BIT, ECL-interfaced programmable delay line
- PDU53-1000C3
- Delay 1000 +/-200 ns, 3-BIT, ECL-interfaced programmable delay line
- PDU53-1000M
- Delay 1000 +/-200 ns, 3-BIT, ECL-interfaced programmable delay line
- PDU53-1000MC3
- Delay 1000 +/-200 ns, 3-BIT, ECL-interfaced programmable delay line
- PDU53-100C3
- Delay 100 +/-50 ns, 3-BIT, ECL-interfaced programmable delay line
- PDU53-100C3
- Delay 100 +/-50 ns, 3-BIT, ECL-interfaced programmable delay line
- PDU53-100M
- Delay 100 +/-50 ns, 3-BIT, ECL-interfaced programmable delay line
PDU54-100M Datasheet i Spec
Producent : Data Delay Devices
Opakowanie : DIP
Pins : 24
Temperatura : Min 0 °C | Max 70 °C
Rozmiar : 46 KB
Zastosowanie : Delay 100 +/-50 ns, 4-BIT, ECL-interfaced programmable delay line
PDU54-100M PDF Pobierz